Dependable System Design and Design methodologies
The design of dependable embedded systems, as technology scales and transient faults emerge as a key issue, poses yet new challenges, especially as the complexity of the devices increases and core- or platform-based methodologies are adopted, thus assembling Commercial Off-The-Shelf (COTS) components that not necessarily expose reliable properties. In this scenario, several activities have been carried out in these years, aimed at investigating reliability issues and developing techniques, methods and methodologies to pursue fault detection and tolerance properties in the digital devices.
Brochure on open projects
More precisely, efforts have been devoted to define new fault detection and/or tolerance hardware and software techniques, based on information, space and time redundancy, acting at different levels of abstraction. Such techniques constitute a repository of dependability-oriented techniques used also within an enhanced, reliability-aware hardware/software co-design flow, currently under development, devoted to the design of complex hw/sw systems.
We have also been working on the fault-error relation, useful when performing the reliability properties analysis of given architectures, in order to determine how (and if) a fault will manifest itself during the normal operational life of the device or in specific test sessions (e.g., post production diagnosis). In this perspective, recent research work is devoted to fault diagnosis and localization.
More details on the research issues, goals and achieved results can be found at http://hermes.ws.dei.polimi.it/, hosting all information and bibliography.
A short presentation of our activities in this field is available here (pdf 1,020KB).