Office @ DEI

Floor: 1, Room: 154
Phone Number: +39.02.2399.3492
Fax Number: +39.02.2399.3411
E-Mail: marco.santambrogio@polimi.it

Office @ CSAIL

Room: 32-G724
Phone Number: +1 (617) 253 2323
Fax Number: +1 (617) 253 7359
E-Mail: santambr@mit.edu

Biblio


Short CV (Eng)
Long CV (Eng)

Pubblications


Google Schoolar
DBLP

NEWS

.:: Corso di Architettura Avanzate dei Calcolatori: Visione esami - 11 Gen 2012 - PT1 @ 5pm

Teaching activities


a.a. 11/12 Courses


Architettura Avanzate dei Calcolatori (It) - Polimi - First Semester, Prof R. Negrini
Corso di Informatica B (It) - Polimi - First Semester, Prof. A. Morzenti (Course webpage)
Advanced Computer Architecture (CS/ECE/MENG 493) - Graduate Course - UIC, Fall Semester, Prof. Marco D. Santambrogio
Corso di Informatica (It) - Polimi - Second Semester, Prof. Marco D. Santambrogio

Polimi: Politecnico di Milano, Milano, Italy.
Unimi: Universita' degli studi di Milano, Milano, Italy
ALaRI: Advanced Learning and Research Institute, University of Lugano, Switzerland
UIC: University of Illinois at Chicago, Chicago, Illinois - USA

The complete list of all my teaching activities is available at this [link].

Education


Postdoc Fellow, Massachusetts Institute of Technology, MA, USA;
Ph.D. degree in Information Engineering, Politecnico di Milano, Italy;
Master degree in Computer Science, University of Illinois at Chicago, Chicago, USA;
Laurea in Computer Engineering, Politecnico di Milano, Italy.

Awards


Progetto Rocca Post-doc Fellowship

December, 2008 - he has been awarded a Progetto Rocca Post-doc Fellowship. .

Dimitri N. Chorafas PhD Thesis Award

From the Chorafas Foundation (Berne, Switzerland) for the best PhD Theses in Systems Engineering and Information Technology May 2008. Thesis title: Hardware/Software codesign methodologies for dynamically reconfigurable systems.

Best paper award

15th International Conference on Very Large Scale Integration, IFIP VLSI-SoC 2007, ReCPU: a Parallel and Pipelined Architecture for Regular Expression Matching.

Co-author of the Best Student Paper award

7th IEEE International Conference on Autonomic Computing (ICAC) 2010, Smartlocks: Lock Acquisition Scheduling for Self-Aware Synchronization.

Research Grants


HiPEAC Collaboration Grant

Title of the research: Self-Aware Reconfigurable Computing Systems for Energy Saving and Performance Enhancement, November 2010 - December 2011

HiPEAC Collaboration Grant

Title of the research: Self-aware and autonomic system, July 2009

EU Projects


FASTER

FASTER will facilitate the use of reconfigurable technology by providing a complete methodology that enables designers to easily implement and verify applications on platforms with general-purpose processors and acceleration modules implemented in the latest reconfigurable technology. We expect that the project will lead to a 20% productivity improvement due to seamless implementation and verification of dynamically changing systems, a 50% total ownership cost reduction for NIDS and Reverse Time Migration systems, with a 2x performance improvement under power constraints for Global Illumination and Image Analysis.
Official website: http://www.fp7-faster.eu/

Research Areas


Computer Architectures && Embedded system design;
Dynamic reconfiguration in embedded system - [DRESD website];
Operating Systems - [CHANGE website];
HW/SW Codesign;
Combinatorial Optimization.

Research Interests


The research interests cover mainly the computer architecture and design automation areas:

Self-adaptable and autonomic systems

A self-adaptive and autonomic computing system is a system able to configure, heal, optimize and protect itself without the need for human intervention. Therefore, aim of this research is to develop performance models and prototypes of software and hardware components required to support the operating system and enable the same application to achieve its goals while working on different systems.

Research && Education

how to create a win-win game where research and the students experience are positively influenced one other.

Methodologies for dynamic reconfiguration in embedded system

Aim of this research is the definition of methodologies and tools for implementing dynamic reconfigurable systems, through the exploration of the solution space, in order to evaluate the most effective solutions that are compatible with the design constraints.

Operating System support for reconfigurable computing

Develop an operating system, for FPGA-based architecture, able to determine where a module should be configured, and to provide an interface towards the Ūnal user in order to request a hardware application in a simplified way. The operating system has to be able to manage on-demand module configuration on an FPGA while providing a set of high-level abstractions to user applications.

Methodologies for hardware/software co-design of embedded systems

Aim of this research work is the development of a methodology and a set of tools for capturing specifications of control-dominated systems, design space exploration, hardware/software partitioning, co-synthesis and co-simulation.

Credits

Graphics by Federico Nava: navafederico AT gmail DOT com